UC Davis ECE Postdocs Salehi and Drescher Named 2021 CIFellows

Computer Innovation Fellowship awardees receive a 250K grant and career development resources

Quick Summary

  • Salehi's work focuses on AI techniques for IoT security, Drescher seeks to determine the underlying structure of graphs

Two UC Davis Electrical and Computer Engineering (ECE) postdocs, Soheil Salehi and Matthew Drescher, were recently named 2020 and 2021 Computer Innovation Fellows (CIFellows), respectively, by the Computing Research Association (CRA) and the Computing Community Consortium (CCC).

Text of CIFellows 2021 and icons of men and women against a colorful background

The CRA and CCC, with strong support from the National Science Foundation (NSF) set up this fellowship program to fund research into the fields of ECE and Computer Science (CS) and to remedy disruptions in academic hiring due to the COVID-19 Pandemic. CIFellows awardees receive a $250,000 research grant for the duration of two years, which will cover their salary as well as career development resources. The 2020 CIFellows class consists of 59 researchers selected from among 550 applicants, and the 2021 CIFellows class consists of 69 researchers selected from among 238 applicants. The 2020 and 2021 CIFellows cohorts are both 52 percent women, from 46 and 49 unique institutions, and will start their fellowships at 43 and 48 different universities. 

Salehi briefly summarizes his work: "Digital circuits work with binary values and each transition between these values requires certain amount of time and power, which we call side-channel information. Adversaries have tried to access secret information stored in the hardware by eavesdropping on these side-channel information. Recently, such attacks have become more complex and become a major concern from IoT edge devices to cloud environments. In my CIFellows project I aim to address the attacks targeting power side-channel information leakage."

His research focuses on using Artificial Intelligence (AI) to provide reliability, security, and energy efficiency for Internet of Things (IoT) sensing and computing hardware. His CIFellows project, SHIELD: Secure Hardware for IoT using Emerging-devices against Side-channel Deep-learning attacks, focuses on addressing the growing challenges of IoT hardware supply-chain security.

Towards this end, he’s developing a novel approach that bridges the ongoing research in deep learning and innovative hardware design to increase security coverage of IoT hardware. The proposed approach provides a defense-in-depth mechanism using emerging spintronic devices to prevent, mitigate, or eliminate various threats and attacks.

Salehi describes his work in more detail: “I hope to continue my research on the topic of power side-channel attack mitigation by designing effective circuit and architectural solutions using emerging spintronic devices. The power side-channel attack remains a major concern from cloud to edge computing and the existing power side-channel assessment frameworks only provide a pass or fail test, focus on post-silicon implementations, and incur high redesigning cost and production time overhead. This calls for solutions that could offer design-time automated power side channel leakage assessment and mitigation approaches to reduce the cost of the leakage assessment as well as provide a more detailed analysis rather than just a pass or fail result.”

Leakage assessments at design-time are less accurate than post-silicon assessments, but they offer more design flexibility. Salehi’s main goal with his CIFellows-funded research is to develop a framework to prevent, detect, and mitigate the power side-channel attacks and limit their impacts at design-time.

He also hopes to develop IoT security solutions that are reliable, effective, low overhead, scalable, and energy efficient. To accomplish this, he’s encouraging design-for-security, where computer architecture is designed with security in mind from the beginning, to save on the need for costly redesigns.

Drescher gives this overview of his work: "We hope to develop a GPU friendly representation of graphs. This should help high performance data analytics systems such as Gunrock to crunch through more data, more quickly."

He works with graphs and graphical processing units (GPUs) and is researching how to determine the underlying structure of graphs. This understanding will help make software algorithms created for GPUs more efficient.

“Graphs are really useful mathematical objects for modelling almost anything, especially connectivity and relationships. But this universal applicability is a bit of a double-edged sword. If I just give you a graph, and tell you absolutely nothing more about it, there is very little structure that an algorithm designer can assume, and so it can be a challenge to write efficient algorithms over something without regular structure.”

His Ph.D. concerns vertex deletion problems, where researchers seek to determine the cheapest set of vertices that can be removed from a graph so that what remains is a member of some more restricted and structured class of graphs.

Drescher believes that understanding graph structure can lead to useful applications in computer engineering and also potentially other fields of study.

“Graphs are much more complex structures than trees, lists or any other [computer architecture]. It is amazing to me how much progress there has been in being able to infer the overall connectivity structure [of graphs]. For example, the famous Grid Theorem and other results of Robertson and Seymour on graph minors. I am also very excited by the very recent work of Reinhard Diestel suggesting that ideas from structural graph theory can be applied to the social sciences to "identify types and predict behavior". At the same time, on the applied side, it seems that there are more and more graph systems out there being used out there, such as graph neural networks.”

With his CIFellows grant, he plans to leverage insights from algorithmic and structural graph theory to create a graph data structure that is structurally aware of the underlying graph that it is representing. This data structure will map data onto the GPU capturing locality and exposing possible parallelism.

As he explains, “When it comes to representing graphs, traditionally it's a two-solution world. You get something like either a sparse graph (adjacency list) or a dense graph (adjacency matrix). But there has been so much interesting work in structural and algorithmic graph theory that can tell us so much more about how a graph is connected. Is it more tree-like with some dense regions or is it basically a grid?”

Drescher’s research has focused on theory in recent years, but he has also worked in industry, where he was fascinated by GPUs. He is excited to have the chance to merge these two worlds.

Both Drescher and Salehi express strong appreciation for the support they have received through UC Davis’ ECE department.

Drescher is thrilled to join the Owens research lab in January. “They have already been very welcoming, and I cannot think of a better opportunity than to be able to work on the Gunrock GPU graph project. It is widely recognized as the leading GPU graph analytics package. It is the standard for comparison in the GPU computing community, is DARPA HIVE’s principal performance reference, and is integrated into NVIDIA’s RAPIDS frame-work for data science. I couldn't be more excited.”

Salehi wishes to name many professional colleagues and mentors who have encouraged his research. “Since starting my postdoctoral research as a CIFellow at UC Davis, I have had the opportunity to collaborate with several faculty members including my mentor Dr. Houman Homayoun, as well as Dr. Avesta Sasan, Dr. Setareh Rafatirad, and Dr. Prasant Mohapatra. These collaborations have resulted in several publications in top-tier conferences as well as funded proposals and projects.”

Primary Category

Secondary Categories